1. Field of the Invention
The present invention relates to a balance adjusting circuit for adjusting the balance between a left sound and a right sound in a stereophonic sound, and more specifically to an electronic balance adjusting circuit for electronically executing a balance adjustment.
2. Description of Related Art
Referring to FIG. 1, there is shown a circuit diagram of one example of the prior art balance adjusting circuit. The balance adjusting circuit is so configured to adjust the balance by determining respective amplification factors of a pair of operational amplifiers by variable resistors.
Specifically, as shown in FIG. 1, one of a pair of input signals A is supplied to an inverting input of an operational amplifier 9 having a non-inverting input connected to ground, and similarly, the other input signal B is supplied to an inverting input of another operational amplifier 10 having a non-inverting input connected to ground. An output of the operational amplifier 9 is fed back to the inverting input of the operational amplifier 9 through one resistor 11A of a variable double resistor 11, and similarly, an output of the operational amplifier 10 is fed back to the inverting input of the operational amplifier 10 through the other resistor 11B of the variable double resistor 11, so that respective gains of the operational amplifiers are controlled by adjusting the feedback amount by means of the variable resistor 11. The output of the operational amplifier 9 outputs one of a pair of output signals A, and the output of the operational amplifier 10 outputs the other output signal B.
The variable double resistor 11 is so constructed that the resistance of the variable resistor 11A and the resistance of the variable resistor 11B are simultaneously changed by an adjusting manual operation while maintaining such a relation that the resistance value of the variable resistor 11A is in inverse proportion to the resistance value of the variable resistor 11B. In this specification, the term "inverse proportion" does not mean a restrict meaning defined in mathematics, but is used to mean such a relation between two values that when one value increases, the other value decreases, and when the one value decreases, the other value increases.
When it is desired to adjust the balance in the prior art balance adjusting circuit shown in FIG. 1, the variable resistor 11 is manually operated so that the respective resistance values of the feedback variable resistor 11A and the feedback variable resistor 11B are caused to change simultaneously. Since the resistance values of the feedback variable resistor 11A and the feedback variable resistor 11B are in inverse proportion to each other, if the resistance value of one of the variable resistors increases, the resistance value of the other resistor decreases, with the result that the respective magnitudes of the output signals A and B simultaneously change in inverse proportion to each other, and therefore, the balance between the output signal A and the output signal B is adjusted.
However, the following problems have been encountered in the prior art balance adjusting circuit shown in FIG. 1.
A first problem is that an output error is large. The reason is that since the variable resistor is so constructed that the resistance value is changed by a physical contact, the obtained resistance value is instable because of friction, temperature change and deterioration.
A second problem is that a circuit scale is large. The reason is that it is physically difficult to scale down the variable resistor so constructed that the resistance value is changed by a physical contact, and the number of parts including the resistors and the operational amplifiers is large.
Here, Japanese Patent Application Pre-examination Publication No. JP-A-08-204771 (an English abstract of JP-A-08-204771 is available from the Japanese Patent Office and the content of the English abstract of JP-A-08-204771 is also incorporated by reference in its entirety into this application) discloses an IQ automatic adjustment circuit for automatically making the gain/offset of I and Q signals equal to the gain/offset of a reference signal in a digital quadrature modulation circuit. However, this circuit does not adjust the balance between the I signal and the Q signal, but makes each of the I signal and the Q signal equal to the reference signal.